foist
[sensors.git] / sensor / sensor.pro
1 update=Tue 29 Dec 2020 09:11:39 PM EST
2 version=1
3 last_client=kicad
4 [general]
5 version=1
6 RootSch=
7 BoardNm=
8 [cvpcb]
9 version=1
10 NetIExt=net
11 [eeschema]
12 version=1
13 LibDir=
14 [eeschema/libraries]
15 [pcbnew]
16 version=1
17 PageLayoutDescrFile=
18 LastNetListRead=
19 CopperLayerCount=2
20 BoardThickness=1.6
21 AllowMicroVias=0
22 AllowBlindVias=0
23 RequireCourtyardDefinitions=0
24 ProhibitOverlappingCourtyards=1
25 MinTrackWidth=0.2
26 MinViaDiameter=0.4
27 MinViaDrill=0.3
28 MinMicroViaDiameter=0.2
29 MinMicroViaDrill=0.09999999999999999
30 MinHoleToHole=0.25
31 TrackWidth1=0.25
32 TrackWidth2=0.4
33 ViaDiameter1=0.8
34 ViaDrill1=0.4
35 dPairWidth1=0.2
36 dPairGap1=0.25
37 dPairViaGap1=0.25
38 SilkLineWidth=0.12
39 SilkTextSizeV=1
40 SilkTextSizeH=1
41 SilkTextSizeThickness=0.15
42 SilkTextItalic=0
43 SilkTextUpright=1
44 CopperLineWidth=0.2
45 CopperTextSizeV=1.5
46 CopperTextSizeH=1.5
47 CopperTextThickness=0.3
48 CopperTextItalic=0
49 CopperTextUpright=1
50 EdgeCutLineWidth=0.05
51 CourtyardLineWidth=0.05
52 OthersLineWidth=0.15
53 OthersTextSizeV=1
54 OthersTextSizeH=1
55 OthersTextSizeThickness=0.15
56 OthersTextItalic=0
57 OthersTextUpright=1
58 SolderMaskClearance=0.0508
59 SolderMaskMinWidth=0
60 SolderPasteClearance=0
61 SolderPasteRatio=-0
62 [pcbnew/Layer.F.Cu]
63 Name=F.Cu
64 Type=0
65 Enabled=1
66 [pcbnew/Layer.In1.Cu]
67 Name=In1.Cu
68 Type=0
69 Enabled=0
70 [pcbnew/Layer.In2.Cu]
71 Name=In2.Cu
72 Type=0
73 Enabled=0
74 [pcbnew/Layer.In3.Cu]
75 Name=In3.Cu
76 Type=0
77 Enabled=0
78 [pcbnew/Layer.In4.Cu]
79 Name=In4.Cu
80 Type=0
81 Enabled=0
82 [pcbnew/Layer.In5.Cu]
83 Name=In5.Cu
84 Type=0
85 Enabled=0
86 [pcbnew/Layer.In6.Cu]
87 Name=In6.Cu
88 Type=0
89 Enabled=0
90 [pcbnew/Layer.In7.Cu]
91 Name=In7.Cu
92 Type=0
93 Enabled=0
94 [pcbnew/Layer.In8.Cu]
95 Name=In8.Cu
96 Type=0
97 Enabled=0
98 [pcbnew/Layer.In9.Cu]
99 Name=In9.Cu
100 Type=0
101 Enabled=0
102 [pcbnew/Layer.In10.Cu]
103 Name=In10.Cu
104 Type=0
105 Enabled=0
106 [pcbnew/Layer.In11.Cu]
107 Name=In11.Cu
108 Type=0
109 Enabled=0
110 [pcbnew/Layer.In12.Cu]
111 Name=In12.Cu
112 Type=0
113 Enabled=0
114 [pcbnew/Layer.In13.Cu]
115 Name=In13.Cu
116 Type=0
117 Enabled=0
118 [pcbnew/Layer.In14.Cu]
119 Name=In14.Cu
120 Type=0
121 Enabled=0
122 [pcbnew/Layer.In15.Cu]
123 Name=In15.Cu
124 Type=0
125 Enabled=0
126 [pcbnew/Layer.In16.Cu]
127 Name=In16.Cu
128 Type=0
129 Enabled=0
130 [pcbnew/Layer.In17.Cu]
131 Name=In17.Cu
132 Type=0
133 Enabled=0
134 [pcbnew/Layer.In18.Cu]
135 Name=In18.Cu
136 Type=0
137 Enabled=0
138 [pcbnew/Layer.In19.Cu]
139 Name=In19.Cu
140 Type=0
141 Enabled=0
142 [pcbnew/Layer.In20.Cu]
143 Name=In20.Cu
144 Type=0
145 Enabled=0
146 [pcbnew/Layer.In21.Cu]
147 Name=In21.Cu
148 Type=0
149 Enabled=0
150 [pcbnew/Layer.In22.Cu]
151 Name=In22.Cu
152 Type=0
153 Enabled=0
154 [pcbnew/Layer.In23.Cu]
155 Name=In23.Cu
156 Type=0
157 Enabled=0
158 [pcbnew/Layer.In24.Cu]
159 Name=In24.Cu
160 Type=0
161 Enabled=0
162 [pcbnew/Layer.In25.Cu]
163 Name=In25.Cu
164 Type=0
165 Enabled=0
166 [pcbnew/Layer.In26.Cu]
167 Name=In26.Cu
168 Type=0
169 Enabled=0
170 [pcbnew/Layer.In27.Cu]
171 Name=In27.Cu
172 Type=0
173 Enabled=0
174 [pcbnew/Layer.In28.Cu]
175 Name=In28.Cu
176 Type=0
177 Enabled=0
178 [pcbnew/Layer.In29.Cu]
179 Name=In29.Cu
180 Type=0
181 Enabled=0
182 [pcbnew/Layer.In30.Cu]
183 Name=In30.Cu
184 Type=0
185 Enabled=0
186 [pcbnew/Layer.B.Cu]
187 Name=B.Cu
188 Type=0
189 Enabled=1
190 [pcbnew/Layer.B.Adhes]
191 Enabled=1
192 [pcbnew/Layer.F.Adhes]
193 Enabled=1
194 [pcbnew/Layer.B.Paste]
195 Enabled=1
196 [pcbnew/Layer.F.Paste]
197 Enabled=1
198 [pcbnew/Layer.B.SilkS]
199 Enabled=1
200 [pcbnew/Layer.F.SilkS]
201 Enabled=1
202 [pcbnew/Layer.B.Mask]
203 Enabled=1
204 [pcbnew/Layer.F.Mask]
205 Enabled=1
206 [pcbnew/Layer.Dwgs.User]
207 Enabled=1
208 [pcbnew/Layer.Cmts.User]
209 Enabled=1
210 [pcbnew/Layer.Eco1.User]
211 Enabled=1
212 [pcbnew/Layer.Eco2.User]
213 Enabled=1
214 [pcbnew/Layer.Edge.Cuts]
215 Enabled=1
216 [pcbnew/Layer.Margin]
217 Enabled=1
218 [pcbnew/Layer.B.CrtYd]
219 Enabled=1
220 [pcbnew/Layer.F.CrtYd]
221 Enabled=1
222 [pcbnew/Layer.B.Fab]
223 Enabled=1
224 [pcbnew/Layer.F.Fab]
225 Enabled=1
226 [pcbnew/Layer.Rescue]
227 Enabled=0
228 [pcbnew/Netclasses]
229 [pcbnew/Netclasses/Default]
230 Name=Default
231 Clearance=0.2
232 TrackWidth=0.25
233 ViaDiameter=0.8
234 ViaDrill=0.4
235 uViaDiameter=0.3
236 uViaDrill=0.1
237 dPairWidth=0.2
238 dPairGap=0.25
239 dPairViaGap=0.25